clash-ghc v0.99

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clash-ghc v0.99 Release Notes

• • New features:
  • Major API overhaul: check the migration guide at the end of Clash.Tutorial

  • New features:

    • Explicit clock and reset arguments
    • Rename CLaSH to Clash
    • Implicit/\ Hidden clock and reset arguments using a combination of reflection and ImplicitParams.
    • Large overhaul of TopEntity annotations
    • PLL and other clock sources can now be instantiated using regular functions: Clash.Intel.ClockGen and Clash.Xilinx.ClockGen.
    • DDR registers:
    • Generic/ASIC: Clash.Explicit.DDR
    • Intel: Clash.Intel.DDR
    • Xilinx: Clash.Intel.Xilinx

  • Bit is now a newtype instead of a type synonym and will be mapped to a HDL scalar instead of an array of one (e.g std_logic instead of std_logic_vector(0 downto 0))

  • Hierarchies with multiple synthesisable boundaries by allowing more than one function in scope to have a Synthesize annotation.

    • Local caching of functions with a Synthesize annotation

  • Bit type is mapped to a HDL scalar type (e.g. std_logic in VHDL)

  • Improved name preservation

  • Zero-bit values are filtered out of the generated HDL

  • Improved compile-time computation

  • 🛠 Many bug fixes

  Older versions

  Check out: * https://github.com/clash-lang/clash-compiler/blob/3649a2962415ea8ca2d6f7f5e673b4c14de26b4f/clash-prelude/CHANGELOG.md * https://github.com/clash-lang/clash-compiler/blob/3649a2962415ea8ca2d6f7f5e673b4c14de26b4f/clash-lib/CHANGELOG.md * https://github.com/clash-lang/clash-compiler/blob/3649a2962415ea8ca2d6f7f5e673b4c14de26b4f/clash-ghc/CHANGELOG.md

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